It is desirable to make transistors as small as possible so that more can be put on a given size integrated circuit die. This allows ever more complex circuits to be made and more economically as linewidths decrease.
Designers have encountered difficulties as linewidths and design rules have shrunken to the sub-100 nanometer (nm) region, such as to the 45-nanometer and 22-nanometer generations. For example, it has become increasingly more difficult to meet line end shortening targets and thus line end bias (LE)-to-line side bias (LS) ratio targets for hardmasks that are used in etch processes to define shallow trench isolation (STI) regions that frame the active areas in the semiconductor substrate.
The traditional method of defining shallow trench isolation regions in a semiconductor substrate is described in connection with FIGS. 1A-1D. FIG. 1A is a side view of a portion of a semiconductor wafer during processing. A blanket layer of hardmask material 20 is formed over the semiconductor substrate 10. A layer of photoresist material is then deposited over the blanket layer of hardmask material 20, exposed to a patterned light source, and developed to form a patterned photoresist layer 30 for defining active regions and isolation regions surrounding the active regions (i.e., the OD region).
FIG. 1B is a top view of the structure illustrated in FIG. 1B. As shown in FIG. 1B, the patterned photoresist layer 30 generally define lines having line side widths “a” and that are separated by a line end distance “b.”
FIG. 1C is a top down view of the structure after etching the hardmask layer 20 through the patterned photoresist layer 30 and subsequent etching of the semiconductor substrate 10 through the etched hardmask layer 20a to form etched substrate 10a. FIG. 1C shows that the individual line features formed in the etched hardmask layer 20a, as defined by the patterned photoresist layer 30, have line side widths “c” that differ from the line side widths “a” of the corresponding features of the developed, patterned photoresist layer 30. More specifically, the line side widths “c” of the features of the etched hardmask layer 20a are less than the widths “a” of the corresponding features of the patterned photoresist layer 30. Also, as illustrated in FIG. 1C, the distance “d” between the line ends of the features of the etched hardmask layer 20a is greater than the distance “b” defined by the patterned photoresist layer 30. These distances “b” and “d” are typically taken at the bottom of the features.
FIG. 1D is a side view of the structure of FIG. 1C. As can be seen in FIG. 1D, the portions of the semiconductor substrate protected by the etched hardmask layer 20a form active regions 50 in the etched semiconductor substrate 10a. The unprotected areas of the semiconductor substrate have been etched to form trenches 40 for forming shallow trench isolations, i.e., the oxide-defined (OD) area.
The line end (LE) critical dimension bias difference, defined as “d“−”b”, and the lines side (LS) critical dimension bias difference, defined as “a“−”c”, are of critical importance in the design of the device. For newer technology generations, e.g., 22 nm design generations, the LE/LS ratio target is less than 1. That is, the target calls for less difference in the line end (LE) shortening than in the line side (LS) shortening. These new generations also call for closer spacing between lines ends and thus tighter tolerances on line end (LE) shortening. For example, the 22 nm generation has a LE shortening target difference of less than 5 nm. Meeting these targets is critical, for example, to ensure proper location of subsequently formed contacts to the device region. Excessive shortening of the line ends of hardmask can result in contacts being formed to the OD region rather than to the device region.
It has proven difficult to meet the targets of these newer generations with the prior art method described above in connection with FIGS. 1A-1D. Further, regardless of whether the illustrated prior art method could meet these targets, the prior art method also suffers from design rule difficulties in so much as the single photolithography/single etch approach to defining both the line side and line end features of the hardmask makes it difficult to adapt the fabrication processes to multiple mask designs, such as mask designs from the same or different customers.
Improved techniques for forming hardmasks for defining the STI-defined regions are desired.